The International Conference for High Performance Computing, Networking, Storage, and Analysis
The International Conference for High Performance Computing, Networking, Storage, and Analysis
Authors: Ryan Grant (Queen's University, Canada), Richard Graham (NVIDIA Corporation), Dirk Pleiter (KTH Royal Institute of Technology, Sweden), Estela Suarez (Forschungszentrum Jülich), Scott Levy (Sandia National Laboratories), Whit Schonbein (Sandia National Laboratories), Oscar Hernandez (Oak Ridge National Laboratory (ORNL)), Mario Baldi (AMD), Jeffrey Young (Georgia Institute of Technology)
Abstract: SmartNIC availability has rapidly increased in recent years due to wider adoption in the cloud. Leveraging these emerging devices in HPC can provide the infrastructure needed to develop new offloading capabilities that go beyond the traditional packet processing to support HPC optimizations. This BoF aims at building a community to discuss SmartNIC use-cases to accelerate applications, improve storage, enable software-defined infrastructures, address operational aspects of HPC centers and more. It also aims to serve as the state-of-the-union for SmartNICs within the HPC audience, acting as a central hub for sharing information on this emerging technology.
Long Description: This BoF aims to bring together experts from the high-performance computing (HPC) community, including representatives from national laboratories, HPC vendors and international research centers, to share their knowledge on how SmartNICs can be used to accelerate HPC applications and other innovative use-cases. The focus will be on discussing new trends in SmartNIC design and their potential use cases within the field.
The primary goal of this BoF is sharing experiences and knowledge to better understand how SmartNICs can be effectively utilized in HPC. Attendees will benefit from experts who have successfully leveraged SmartNICs (e.g. Data Processing Units (DPUs), Infrastructure Processing Units (IPUs), etc) in their applications covering topics such as offloading communication to SmartNICs, optimizing storage processing and using them for infrastructure workloads. Moreover, the BoF will explore other potential scenarios for future HPC-based infrastructures that leverage SmartNICs to connect to edge devices or remote locations to support federated systems (e.g. federated AI, instruments, etc).
The BoF will cover both use cases and advances in SmartNIC hardware as well as sharing information and discussing the software ecosystem supporting these devices. This includes exploring the state of specifications for programming SmartNICs on a range of technologies and figuring out the most effective ways to integrate them into existing HPC software stacks that can leverage their capabilities (e.g. MPI, OpenMP offload, scientific libraries, storage frameworks, etc). This will create a better qualitative and quantitative understanding of the benefits of SmartNICs in HPC infrastructures and allow the community to identify research and development gaps.
In terms of relevance and impact, this BoF addresses the growing importance of SmartNICs as a new type of accelerator for HPC. It particularly focuses on their benefits for HPC applications and other domains, such as climate modeling, FFTs, molecular dynamics, and electronic structure codes as well as its potential uses on more complex workloads. Such as the case of DPUs supporting federated systems such as instruments/devices to supercomputing or several remote sites supporting secure federated learning. As SmartNICs become increasingly prevalent in HPC, it is crucial for the community to come together and collectively consider how best to leverage this emerging technology.
The BoF organizing team represents a variety of nationalities and backgrounds. The participation of a diverse public will be encouraged through an open and friendly discussion atmosphere. It will be announced via HPC-related mailing lists and distribution channels including those addressing diversity, such as WHPC.
To build a community, we will continue to operate an already created website (https://dpu.ornl.gov) and a mailing list of the interested participants, including advertising the BoF to increase mailing list participation. The presentations will be uploaded to the website, together with a summary of the BoF discussions. This BoF is a continuation of the BoFs we had at SC 2021 and 2022 (SmartNICs : Exploring the Future of In-Network Computation with the HPC Community). It also builds on the discussions we had at the DPU 2023 workshop at ISC'23, where we identified new leaders from the community interested in this topic.
Website: https://sites.google.com/view/sc-smartnic-bof