Authors: Boma Adhi, Emanuele Del Sozzo, and Carlos Cortes (RIKEN Center for Computational Science (R-CCS)); Xinyuan Wang (University of Toronto, RIKEN Center for Computational Science (R-CCS)); and Tomohiro Ueno and Kentaro Sano (RIKEN Center for Computational Science (R-CCS))
Abstract: This poster highlights our previous and future design-space exploration effort to optimize our CGRA architecture for HPC, i.e., intra-CGRA interconnect optimization, FMA and transcendental operation on CGRA, programmable buffer, systolic-array style execution on CGRA, predication support, and FPGA based emulation on actual HPC environment.
Best Poster Finalist (BP): no
Poster: PDF
Poster summary: PDF
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