The International Conference for High Performance Computing, Networking, Storage, and Analysis
The International Conference for High Performance Computing, Networking, Storage, and Analysis
Workshop: Fourth Workshop on Heterogeneous Memory Systems (HMEM)
Authors: Hatem Elshazly (Barcelona Supercomputing Center (BSC)); Harald Servat (Intel Corporation); Joao Pedro Barreto (INESC-ID, Instituto Superior Técnico, Universidade de Lisboa); and Antonio Peña (Barcelona Supercomputing Center (BSC))
Abstract: Heterogeneous memory architectures have recently emerged and revolutionized the traditional memory hierarchy. Today’s architectures may comprise multiple memory technologies next to DRAM, such as: 3D-stacked memory, high-bandwidth multi-channel RAM, persistent memory, or Compute Express Link (CXL)-based architectures.
Even though heterogeneous memory architectures can benefit applications in terms of improved performance, energy-efficiency, and cost trade-offs, exploiting the full potential of such complex architectures poses significant challenges. Since heterogeneous memory architectures introduce dramatic disruptions to the usual memory hierarchy assumptions that have guided decades of system and software design, we need to rethink solutions across all the layers of system and software stack to embrace the new era of memory heterogeneity and satisfy modern applications demands.
As in previous years, the workshop on Heterogeneous Memory systems (HMEM) will serve as a forum to bring together researchers from the HPC community to present and discuss ongoing research around heterogeneous memory systems.
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