The International Conference for High Performance Computing, Networking, Storage, and Analysis
The International Conference for High Performance Computing, Networking, Storage, and Analysis
Workshop: Tenth SC Workshop on Best Practices for HPC Training and Education
Authors: Amir Raoofy (Leibniz Supercomputing Centre; Technical University Munich, Computer Architecture and Parallel Systems); Bengisu Elis and Vincent Bode (Technical University Munich, Computer Architecture and Parallel Systems); Minh Chung (Ludwig-Maximilians-University Munich); Sergej Breiter (Ludwig Maximilian University of Munich); Maron Schlemon (German Aerospace Center (DLR)); Dennis-Florian Herr (Technical University Munich, Computer Architecture and Parallel Systems); Karl Fuerlinger (Ludwig Maximilian University of Munich); Martin Schulz (Technical University Munich, Computer Architecture and Parallel Systems; Leibniz Supercomputing Centre); and Josef Weidendorfer (Leibniz Supercomputing Centre; Technical University Munich, Computer Architecture and Parallel Systems)
Abstract: Giving students a good understanding of how micro-architectural effects impact achievable performance for given HPC workloads is essential. It enables them to find effective optimization strategies and to reason about sensible approaches towards better efficiency. This paper describes a lab course held in collaboration between LRZ, LMU and TUM. The course was born with a dual motivation in mind: filling a gap in educating students to become HPC experts, as well as understanding the stability and usability of emerging HPC programming models for recent CPU and GPU architectures with the help of students. We describe the course structure used to achieve the goals, resources made available to attract students, and experiences and statistics from running the course now for six semesters. We conclude with an assessment of how successfully the lab course could meet the vision.
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