The International Conference for High Performance Computing, Networking, Storage, and Analysis
The International Conference for High Performance Computing, Networking, Storage, and Analysis
Workshop: 2023 International Workshop on Performance, Portability, and Productivity in HPC (P3HPC)
Authors: Aristotle Martin (Duke University); Geng Liu (Argonne National Laboratory (ANL)); William Ladd (Duke University); Seyong Lee, John Gounley, and Jeffrey Vetter (Oak Ridge National Laboratory (ORNL)); Saumil Patel, Silvio Rizzi, Victor Mateevitsi, and Joseph Insley (Argonne National Laboratory (ANL)); and Amanda Randles (Duke University)
Abstract: Preparing for the deployment of large scientific and engineering codes on upcoming exascale systems with GPU-dense nodes is made challenging by the unprecedented diversity of device architectures and heterogeneous programming models. In this work, we evaluate the process of porting a massively parallel, fluid dynamics code written in CUDA to SYCL, HIP, and Kokkos with a range of backends, using a combination of automated tools and manual tuning. We use a proxy application along with a custom performance model to inform the results and identify additional optimization strategies. At scale performance of the programming model implementations are evaluated on pre-production GPU node architectures for Frontier and Aurora, as well as on current NVIDIA device-based systems Summit and Polaris. Real-world workloads representing 3D blood flow calculations in complex vasculature are assessed. Our analysis highlights critical trade-offs between code performance, portability, and development time.