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DTSTART;TZID=America/Denver:20231115T100000
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UID:submissions.supercomputing.org_SC23_sess503_job105@linklings.com
SUMMARY:Design Verification Engineer
DESCRIPTION:SambaNova Systems is looking for talented and motivated engine
 ers to help us solve some of the most challenging problems in machine lear
 ning, artificial intelligence, and data analytics. As a Design Verificatio
 n Engineer you'll have the opportunity to contribute to our cutting edge m
 achine learning chips.\n\nResponsibilities\n\nDevelop and maintain test-be
 nch components, test cases, and scripts for design verification at the blo
 ck, full chip, system, and gate-level benches\n\nDevelop test plan for fun
 ctional, performance, and post-silicon verification\n\nParticipate in mapp
 ing and coding ML and AL application flows for verification and compiler d
 evelopment\n\nParticipate in design verification reviews, maintain regress
 ions, and drive failure root-cause\n\nCollaborate with design, architectur
 e, and software teams to innovate and solve problems\n\n
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